1. Field of the Invention
The present invention relates to a semiconductor device and a method of fabricating the same and more particularly, to formation of single crystal and polycrystal based on solid phase growth.
2. Description of the Related Art
For a higher LSI integration, attempts have been made not only to reduce the size of semiconductor devices in the LSI circuit but also to construct LSI circuit in a laminated structure. There has been a proposal that not only operation circuits and memory circuits are laminated but also a light receiving part, a signal transfer part, a high-speed operating part such as a BiMOS and a capacitor are laminated in this order from its top layer. Such formation of semiconductor devices in the laminated structure has great possibility in applying it to a wide range of new multi-functional devices. It also serves to reduce the number of fabricating steps. For this reason, studies and developments in this field have been in progress in Japan as well as foreign nations.
One of the basic structures for laminated type devices is SOI (Si on insulator) substrate structure. Conventional techniques for laminating process include (1) a wafer bonding technique, (2) SIMOX (separation by implanted oxygen) technique and (3) sol id-phase growth technique. In an example of the solid-phase growth technique (3), an amorphous semiconductor film 3 (e.g., amorphous Si film) is previously deposited on a necessary part (such as a silicon oxide film 2 (insulator film) formed on a silicon substrate 1) at a low temperature of about 300.degree.-600.degree. C. to form an SOI as shown in FIG. 134(a), and the SOI is heat treated for example at a low temperature of about 500.degree.-600 .degree. C. to be crystallized in a single crystal form in solid phase condition, whereby a single crystalline silicon layer 4 as shown in FIG. 134(b) is formed. In the drawings, reference numeral 2 denotes a silicon oxide film which is formed through spontaneous oxidization. As seen from the temperature range of the SOI formation step, the processing temperature is very low so that there occurs substantially no redistribution of impurities which were doped into the substrate before the procedure reaches the SOI step. The solid-phase growth technique in SOI formation has an advantage that the technique can be readily employed in the fabrication steps of semiconductor devices and thus the laminated structure can be easily formed.
Although the solid phase growth technique is advantageous in many points, there are some disadvantages still to be eliminated. Because of the disadvantages, this technique is not being used widely at present.
In conventional solid phase growth technique, the lateral length of solid phase growth is about 1 to 2 .mu.m. This is too short to carry a device thereon. To extend the growth length, impurities is previously doped into the amorphous film at an impurity concentration of about 10.sup.20 /cm.sup.3. However, the impurity doped region is not suited for the formation of devices. Further, the crystallization in the solid phase growth region is not always in a desirable condition. For example, when an MOS device is prepared according to the conventional method, its mobility is 200 -400 cm.sup.2 /Vsec in an enhancement type n-MOS device, which is 1/2- 1/3 of the mobility of an ordinary device prepared on a single crystalline substrate. Further, the solid phase growth length depends largely on factors caused by the thermal phenomenon. More specifically, in a non-crystalline region, during a period when solid phase growth takes place from a seed, atoms constituting the amorphous film are repeatedly subjected to separation and aggregation at a specific frequency depending on its process temperature. Once an aggregation of the atoms exceeds a predetermined size at a given probability, the growth starts and advances quickly using the aggregation as its seed. As a result, a crystal grown from a proper seed hits against a crystal grown from the aggregation of atoms so as to stop its growth or to degrade the quality of the crystal. Further, since the crystal growth depends on the thermal factors, the solid phase growth length is distributed with probability. As a result, when several mill ions or more of re-crystallization regions are to be created, large variance in the length tends to occur, thereby decreasing the reliability.
In the conventional technique, it is considered that thicker film produces better crystal. There is a report of an experiment describing that, in a single crystallization film formed by a horizontal solid-phase growth with use of seed, a thicker film creates a single crystal in a broader region. Further, in order to move atoms through heat treatment alone to such an extent as to change the shape of the substance, the temperature must be increased as high as nearly its melting point. In addition, since the mechanism of the solid phase growth has not been fully clear yet, the present situation is that new processes cannot be developed and new applications cannot be invented. Therefore, the conventional solid phase growth technique has been employed at most in forming a polycrystalline silicon load transistor or a polycrystalline silicon fuse ROM.
Accordingly, in the field of the solid phase growth technique, it is essential to work for the following subjects.
1. To increase the solid phase growth length PA1 2. To improve the quality of crystal grown in a solid phase growth region PA1 3. To improve the reliability of the solid phase growth PA1 (1) Carrying out film deposition at a deposition rate within a specific range for each heat treatment temperature. PA1 (2) Preparing a film having a thickness within a specific range at each heat treatment temperature. PA1 (3) Preparing a film having a thickness within a specific range and a dopant impurity concentration within a specific range at each heat treatment temperature. PA1 (4) Preparing an underlying material at each heat treatment temperature and a film having thickness within a specific range. PA1 (5) For the purpose of keeping the surface of the amorphous film in a condition that the inter-atomic relation is loosened, using an apparatus for creating an atmosphere in which the surface of the amorphous film is cleaned. PA1 (6) For the purpose of keeping the surface of the amorphous film in a condition that the inter-atomic relation is loosened or of further amplifying the loosened relation, using an for coating another film on the amorphous apparatus film and subjecting to a heat treatment. PA1 (1) Carrying out film deposition at a deposition rate within a specific range for each heat treatment temperature. PA1 (2) Preparing a film having a thickness within a specific range at each heat treatment temperature. PA1 (3) Preparing a film having a thickness within a specific range and a dopant impurity concentration within a specific range at each heat treatment temperature. PA1 (4) Preparing an underlying material at each heat treatment temperature and a film having thickness within a specific range. PA1 (1) Impurity concentrations at the respective heat treatment temperatures. PA1 (2) Surface state at the respective heat treatment temperatures. PA1 (3) The material and structure of the underlying film at the respective heat treatment temperature. PA1 .beta.=0.33675, n=22.956, and d=2.0417